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Qualification details
QF Foudation course in VLSI Design.pdf
Foundation course in VLSI Design
- Job Description VLSI Design Engineer: Design and development of VLSI based design, IP Core development. VLSI Test Engineer: verification, test patterns generation RTL Design Engineer: Develop design specifications based on the project requirements.
- Originally Approved16th NSQC Meeting - NCVET - February, 2022
- Last Revised-
- Code2022/EHW/NIELIT/05319
- SectorIT-ITeS
- Notional Hours90
- Accrediting BodiesNIELIT
- Certifying BodiesNational Institute of Electronics and Information Technology NIELIT Bhawan, Plot No. 3, PSP Pocket, Sector-8, Dwarka, New Delhi-110077
- Proposed Occupation
VLSI Design Engineer
VLSI Test Engineer
RTL Design Engineer - International Comparability
NA
- Progression Pathway
Professional:
RTL Engineer > Sr. RTL Engineer
Test Engineer > Design Engineer
Academic:
i) Horizontal Progression:
Courses in the area of Digital VLSI, FPGA and Layout Design
ii)Vertical Progression
Advance Diploma in VLSI physical Design Engineer,PG Diploma in VLSI and Embedded hardware Design, M.Tech in VLSI - Planned arrangements for RPL
Candidates with 1 year of experience in the relevant field may apply directly for evaluation.
- Qualification File QF Foudation course in VLSI Design.pdf
- Supporting Documents
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Formal structure of the qualification
Title of unit or other component Mandatory/ Optional Estimated size (Hours) Level Introduction to Digital Electronics Mandatory 10 4 Basics of Digital VLSI Technology Mandatory 12 4 Fabrication Process and Layout Design Rules Mandatory 6 4 Digital CMOS Design Mandatory 12 4 Hardware Modeling Using Verilog Mandatory 28 4 Implementation of Logic gates/circuits in Verilog using Tool (ModelSim or Xilinx) Mandatory 22 4
